Silicon Designs Analog Accelerometer ASIC Design

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SILICON DESIGNS ANALOG ASIC

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Our custom Analog ASIC is fabricated in CMOS and functions as a capacitance-to-voltage converter. It utilizes a switched-capacitor amplifier to convert the low-level capacitance changes of the sense element into a high-level voltage output. Instead of amplifying a variable voltage using fixed capacitors, it amplifies a fixed voltage using variable capacitors. The ASIC modulates the capacitive sense element and monitors the effect of accelerations on the sense element via the sense amplifier. The signal is then demodulated and further amplified to provide a low impedance differential voltage output pair (AOP & AON).

An on-chip clock phase generator controls the sequence in which the reference voltages are switched onto the sense elements' capacitor plates and also controls the switching sequence of the switched capacitor based modulator, demodulator and sense amplifier. Non-volatile PROM and D/A converters are used to generate these reference voltages and provide a method of calibrating the accelerometer, thus compensating for the bias and scale factor fabrication tolerances of the sense element.

The buffer amplifiers within the ASIC provide a low enough output impedance that additional signal conditioning is usually not required. The differential output is useful in rejecting common mode noise that is typically present in electrically noisy environments.

The electronics produces a large voltage deviation (+/- 4 volts) that is linearly proportional to the applied acceleration. The output is measured differentially as AOP-AON. This voltage varies from (AOP-AON) = - 4 volts for negative full scale acceleration to (AOP-AON) = +4 volts for positive full scale acceleration. At zero acceleration, the output is nominally at (AOP-AON) = 0 volts.